The present invention relates to a writing circuit in a magnetic recording apparatus such as a hard disk drive (HDD) or a floppy disk drive (FDD) drive. More particularly, this invention relates to a magnetic recording writing circuit which can arbitrarily control the waveform of a write current in writing.
FIG. 4 is a circuit diagram of a conventional writing circuit in a magnetic recording apparatus. An arrangement of the circuit will be explained below.
As shown in FIG. 4, head 1 of this magnetic recording apparatus incorporates an equivalent circuit including inductance L1, resistor R1, capacitor C1, and resistor R3 for reducing the impedance at a resonance frequency of the head 1.
I1 denotes a reference current source for supplying a reference current for a write current Iw. The reference current source I1 is connected at one terminal to the collector of an NPN transistor Q1 and the base of another NPN transistor Q2. The base of the NPN transistor Q1 is connected to the emitter of the NPN transistor Q2 and the base of a further transistor Q16. The collector of the NPN transistor Q2 as well as the other terminal of the current source I1 are connected to a third power source V3. The emitter of the NPN transistor Q1 and the emitter of the NPN transistor Q16 are connected to a second power source V2 via two resistors R4 and R5 respectively.
The collector of the NPN transistor Q16 is connected to the emitters of two NPN transistors Q17 and Q18 which are in turn connected at their collectors to the emitters of two transistors Q19 and Q20 respectively. The collectors of the two transistors Q19 and Q20 are connected to a first power source V1. Connected between the collectors of the two transistors Q17 and Q18 is the head 1.
The bases of the transistors Q17, Q18, Q19, and Q20 are connected to four terminals J, K, L, and M respectively.
Because of a current mirror function in FIG. 4, the collector of the NPN transistor Q16 receives a current I5 which is proportional to the transistor size of both the NPN transistors Q1 and Q16 at the reference current I1.
FIG. 5 illustrates the waveforms of input voltages at the terminals J, K, L, and M and the waveforms of corresponding currents I2, I3, I4, I5, and Iw.
During the period T9, the terminals K and L are fed with signals having low logical level and the terminals J and M are fed with signals having high logical level. This switches the NPN transistors Q19 and Q18 off and the NPN transistors Q17 and Q20 on. Accordingly, during the period T9, the current running from the source V1 is passed through the NPN transistor Q20 and turned to Iw in the head 1 and the current I3 is passed through the NPN transistor Q17 and turned to I5.
During the next period T10, the current from the source V1 is passed through the NPN transistor Q19 so the current Iw in the head 1 runs in a reverse of the direction in T9. The current I2 is passed through the NPN transistor Q18 and turned to I5.
The current Iw in the head 1 has a waveform shown in FIG. 5 because of the action of inductance L1, parasitic capacitance C1, resistance R1, and damping resistance R3. More specifically, the waveform includes an overshoot at the rise a7 and its recovery a8 before the normal write signal period at one polarity and another overshoot at the fall a9 and its recovery a10 before the normal write signal period at the other polarity.
In the conventional magnetic record writing circuit, such various time factors of the current Iw or the write current for magnetic recording, which include the rise speed and overshoot at each rise a7, overshoot recovery a8, fall speed and overshoot at each fall a9, and overshoot recovery a10, can hardly be controlled.
While an arrangement for increasing the write current with a fixed level at the rise is disclosed in U.S. Pat. No. 5,869,988, no attempt has been successfully made to provide a magnetic recording writing circuit controlling the overshoot and the overshoot recovery and modifying the current in response to a change in the reference current I1.
It is an object of this invention to provide a magnetic record writing circuit which can control the rise and fall of a write current to minimize the write time and the overshoot period.
In the magnetic record writing circuit according to one aspect of this invention, an arrangement is provided such that, a current having a higher level than a level of a write current is supplied for a desired period of time during rise and fall of the write current, and a current having a lower level than the level of the write current is supplied for a desired period of time during overshoot at the rise and fall of the write current.
In the magnetic record writing circuit according to another aspect of this invention, the current for driving a head is supplied by the action of a transistor group where the current source transistor is joined in parallel with at least one damping transistor and released from the head by the action of load transistors via a mirror transistor which comprises a reference current source and a mirror circuit.
Other objects and features of this invention will become apparent from the following description with reference to the accompanying drawings.